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ISL8560MREP
Data Sheet December 13, 2007 FN6621.0
DC/DC Power Switching Regulator
The ISL8560MREP is a step down DC/DC power switching regulator which accepts 9.0V to 60V input and provides a 2A output current. The output voltage can be set in the range between 1.21V and 55V by means of an external divider. The device uses an internal power DMOS transistor with a typical rDS(ON) of 0.19 to obtain very high efficiency and high switching speed. A switching frequency in the range of 100kHz to 600kHz can be realized (the maximum power dissipation of the various packages must be observed). Notable features of this next generation of DC/DC converter includes pulse-by-pulse current limit for FET protection, hiccup mode for short circuit protection, voltage feedforward regulation, Frequency SYNC, soft-start, low standby current of 60A typical in the disabled state, and thermal shut-down. The device is available in a 20 Ld QFN package.
Features
* Specifications per DSCC VID V62/08608 * Full Mil-Temp Electrical Performance from -55C to +125C * Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site * Full Homogeneous Lot Processing in Wafer Fab * No Combination of Wafer Fabrication Lots in Assembly * Full Traceability Through Assembly and Test by Date/Trace Code Assignment * Enhanced Process Change Notification * Enhanced Obsolescence Management * Eliminates Need for Up-Screening a COTS Component * Voltage Feedforward Mode * Step Down DC/DC Supporting up to 2A Based on Max TJ and VIN/VOUT * Input Voltage Range of 9.0V to 60V * Internal Reference of 1.21V 1% * Adjustable Output Voltage Range of 1.21V to 55V * Adjustable Switching Frequency 100kHz to 600kHz * Frequency SYNC Pin
Device Information
The specifications for an Enhanced Product (EP) device are defined in a Vendor Item Drawing (VID), which is controlled by the Defense Supply Center in Columbus (DSCC). "Hot-links" to the applicable VID and other supporting application information are provided on our website.
Pinout
ISL8560MREP (20 LD QFN) TOP VIEW
VIN VIN VIN VIN LX
* Zero Load Current Operation * Pulse by Pulse Mode Current Limit and Hiccup mode * Low Standby Current of 60A Typical * Thermal Shut-down * Load Dump to 100V for 400ms
15 14 13 12 11 LX SS PGND PGOOD REF
20 LX LX BOOT EN VCC5 1 2 3 4 5 6
19
18
17
16
Applications
* Industrial and Avionics power supplies * Portable computers * Battery chargers * Distributed power systems
7
8
9
10
COMP
RTCT
SGND
SYNC
FB
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)"
Ordering Information
VENDOR PART NUMBER (Notes 1, 2) ISL8560MREP NOTES: 1. Refer to TB347 for details on reel specifications. 2. Devices must be procured to the VENDOR PART NUMBER. VENDOR ITEM DRAWING V62/08608-01XB PART MARKING ISL8560MREP TEMP. RANGE (C) -55 to +125 PACKAGE 20 Ld 6x6 QFN PKG. DWG. # L20.6x6B
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL8560MREP Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP)
L20.6x6B
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VJJB ISSUE C) MILLIMETERS SYMBOL A A1 A2 A3 b D D1 D2 E E1 E2 e k L L1 N Nd Ne P 0.635 0.50 3.33 3.33 0.28 MIN 0.80 NOMINAL 0.90 0.20 REF 0.33 6.00 BSC 5.75 BSC 3.43 6.00 BSC 5.75 BSC 3.43 0.80 BSC 0.60 20 5 5 0.60 12 0.70 0.15 3.53 3.53 0.38 MAX 1.00 0.05 1.00 NOTES 9 9 5, 8 9 7, 8 9 7, 8 8 10 2 3 3 9 9 Rev. 0 12/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on each D and E. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & are present when Anvil singulation method is used and not present for saw singulation. 10. Depending on the method of lead termination at the edge of the package, a maximum 0.15mm pull back (L1) maybe present. L minus L1 to be equal to or greater than 0.3mm.
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 2
FN6621.0

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